First Results of an “Artificial Retina” Processor Prototype
1 INFN Sezione di Pisa, Italy
2 Università di Pisa, Italy
3 Scuola Normale Superiore, Pisa, Italy
4 Fermi National Accelerator Laboratory, Batavia, IL, USA
5 CERN, Geneva, Switzerland
a e-mail: email@example.com
Published online: 15 November 2016
We report on the performance of a specialized processor capable of reconstructing charged particle tracks in a realistic LHC silicon tracker detector, at the same speed of the readout and with sub-microsecond latency. The processor is based on an innovative pattern-recognition algorithm, called “artificial retina algorithm”, inspired from the vision system of mammals. A prototype of the processor has been designed, simulated, and implemented on Tel62 boards equipped with high-bandwidth Altera Stratix III FPGA devices. The prototype is the first step towards a real-time track reconstruction device aimed at processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate.
© The Authors, published by EDP Sciences, 2016
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